Designers need to minimize flicker in display numbers, especially for medical and instrumentation applications where users are expecting a stable, flicker-free readout. As the primary source of display flicker is noise from the analog-to-digital converter (ADC), designers need to choose this component carefully.
Overdesigning by selecting too many delta-sigma ADC noise-free bits will unnecessarily increase component cost and power. Alternatively, an under-design with too few noise-free bits will create unacceptable display flicker.
This article briefly discusses how to use crest factor theory to determine the appropriate converter. It will provide an example and use a formula that gives an accurate estimation of the available number bits to achieve a preset level of flicker.
Random converter noise
Everything in nature displays noise of some sort. A live oak tree has millions of leaves which are generally the same, but with different details. One can describe the leaf pattern variations as noise. Because of noise, every measurement of a physical quantity is uncertain, but there is an expected general pattern. A Galton box illustrates this phenomenon (Figure 1).
Figure 1: Numerous balls individually fall through a Galton Box to create a normal or Gaussian distribution at the bottom of the box. (Image source: Digi-Key Electronics)
A ball dropped at the top of the Galton box has a 50-50 chance of bouncing to the right or left. These statistics are played out as several balls drop to their final resting place at the bottom of the box. It is impossible to determine the resting place of any one specific ball, however, over time multiple balls create a noticeable normal distribution.
The ADC also presents a level of uncertainty while producing the output digital sample. This uncertainty reflects the converter’s internal silicon noise. Although noise seems like a completely random event, the normal distribution pattern describes this event over time (Figure 2).
Figure 2: The output of an ADC (a) with a single input voltage over time displays noise that is bounded by a normal or Gaussian distribution (b). (Image source: Digi-Key Electronics)
When defining the root-mean-square (RMS) or standard deviation (s) and peak-to-peak (pk-pk) quality of a converter, a vendor is actually referring to noise. Statistically, the description of the ADC’s output code noise can be in terms of the mean (h), root-mean-square (RMS) or standard deviation (s), and peak-to-peak (pk-pk). Equation 1 describes h and Equation 2 describes s.
Where x1, x2, x3, xn are ADC samples in volts or bits, and n is the total number of ADC samples.
Converter datasheets have two ways to describe the amount of random output noise with a single value. The first method uses the standard deviation or RMS from a noisy distribution of data. The second method describes a converter’s noise with a pk-pk value.
Taming the noise using a crest factor
In theory, one would have to wait an infinite amount of time to determine whether the designed system would remain within a set of peak-to-peak noise boundaries. In practice, a more reasonable approach is required
Since the noise is following a Gaussian distribution pattern, designers can use a statistical model to predict the peak-to-peak noise with a good degree of certainty. This technique of predicting the peak levels of noise is relatively simple to calculate using a crest factor. The crest factor for noise occurrences is a statistical estimate that determines the probability that an occurrence of a noisy event will remain within a defined boundary.
The technique of predicting the allowable fluctuation in the data display is relatively simple. After choosing a crest factor, which is based on the percentage of noise events that will remain within defined limits, multiply the value of two standard deviations by the selected crest factor (Equations 3 and 4).
Vpk-pk = 2 × crest factor × VRMS
pk-pk(bits) = RMS(bits) − crest factor in bits
This technique determines the percentage of output data results that will be beyond the display digits and out of sight. The industry standard crest factor is 3.3, which is appropriate for a three-digit display. To keep a five-digit display flicker-free, a 4.4 crest factor value is appropriate (Figure 3).
Figure 3. To keep a five-digit display flicker free, a crest factor of 4.4 is appropriate. (Image source: Digi-Key Electronics)
In Figure 3, the peak-to-peak voltage noise equals the equivalent output voltage noise (RMS) 2 crest factor. The peak-to-peak noise bits equals the noise in bits (RMS) – crest factor, in bits. From the selected crest factor, Figure 3 defines the probability of an occurrence that will exceed the defined peak-to-peak limits.
Deriving the right ADC solution
In medical or instrumentation application environments, users expect stable, flicker-free numeric displays. As the primary driver of flicker is noise, designers need to choose their sensing system ADC carefully. An example of a five-digit display pressure gauge uses a pressure sensor and a delta-sigma ADC to sense the raw pressure. The challenge is to pick the optimum ADC for this application (Figure 4).
Figure 4: Front-end instrumentation for a pressure gauge includes a pressure sensor, a delta-sigma ADC and a processor or microcontroller. (Image source: Digi-Key Electronics and Huaxin Instrument)
The number of bits that can fit into a 5-digit display is equal to 99,999, or 105 – 1. Equation 5 calculates the proper resolution (N) of an ADC for this system.
Where N = the ADC’s resolution
According to Equation 5, the correct delta-sigma ADC resolution for a 5-bit display is 16.6 bits. In other words, the converter’s noise-free resolution must be equal to, or greater than, 16.6.
Delta-sigma converter datasheets, such as the one for Analog Devices’ AD7175-2BRUZ-RL7, have noise specifications that allow the designer to determine the suitability of the converter for a specific application. The AD7175-2’s datasheet specifies various conditions. Generally, the specifications available for each condition are the RMS noise, effective resolution, peak-to-peak noise, and peak-to-peak resolution (Figure 5).
Figure 5: The AD7175-2’s RMS noise and peak-to-peak resolution vs. output data rate using Sinc3 filter. (Image source: Analog Devices)
The only values that are very helpful in Figure 5 are the RMS noise and effective resolution. The peak-to-peak noise and peak-to-peak resolution usually represent noise values with a crest factor of 3.3.
Applying the crest factor in bits of 3.14 from Figure 3 to Equation 4 gives:
pk-pk(bits) = 20.9bits – 3.14bits
pk-pk(bits) = 17.76bits
Reading off the table in Figure 5, the ADC7175-2’s maximum data output rate for this application is 62,500 samples per second (SPS). Higher resolution means lower output data rates, so the only data rate that will not produce a 5-digit display is 250,000 SPS.
Conclusion
For medical or instrumentation display stability, designers need to minimize display flicker. The primary source of display flicker noise is the internal ADC. This article presents the proper use of crest factor theory to determine the appropriate converter and applies this theory to Analog Devices’ AD7175-2BRUZ-RL7 ADC.
